Why Thermal Design Is Becoming a System-Level Chip Challenge

Heat is becoming a design constraint that chip teams can’t hand off to a specialist and revisit later. As dies stack and power rises, temperature affects resistance, timing and current in ways that feed back into the design. The practical challenge is to analyze those effects together, across workloads and disciplines, while keeping performance and cost in view.

That was the focus of a discussion at the Design Automation Conference among Lang Lin of Synopsys, Jack Berg of Silvaco, Satish Radhakrishnan of Vinci, Chris Mueth of Keysight EDA and John Ferguson of Siemens EDA. Their central point: thermal behavior has to be considered alongside electrical and mechanical effects, early enough to influence implementation choices.

L-R: Silvaco’s Berg; Synopsys’ Lin; Vinci’s Radhakrishnan; Keysight’s Mueth; Siemens’ Ferguson.

Voltage, timing and temperature form a feedback loop

Voltage illustrates why thermal optimization can’t be treated as a final check. Lowering voltage reduces heat, but it can also change timing and cut performance. Keeping a chip fast may increase thermal stress. Designers therefore need to compare voltage choices against timing budgets and power behavior, then repeat that analysis under relevant workloads.

Lin described the needed process as a loop involving timing, thermal analysis and supply voltage or power integrity. In practice, that means running different combinations, checking for failures and determining whether the design can still close. The difficulty is that engineers don’t yet have a single tool that handles this full cycle. Place-and-route, timing, voltage and thermal work can still require separate steps and specialist effort.

Temperature also changes the electrical conditions being analyzed. As current flows and the chip heats up, resistance shifts. That can alter current, power use and performance, which in turn affects how much cooling the system needs. Radhakrishnan described the simulation problem as transient and coupled: teams need to understand how these variables change over time, not just evaluate a static temperature estimate.

The resulting design choices can pull in opposite directions. More power may improve performance, but it raises temperature; adding cooling can then make higher power levels possible. Modeling only one part of that chain risks missing the effect on the rest. The engineering work increasingly centers on finding a workable balance across the whole system.

Stacking pushes cooling and materials into the design

Three-dimensional integration is already appearing in forms such as stacked high-bandwidth memory, but denser vertical integration makes heat removal more difficult. The participants expect further progress, while emphasizing that it depends on materials, thermal engineering and mechanical expertise as much as on chip design.

Some proposed approaches could add substantial cost. Mueth cited stacked intercoolers with circulating fluid as one possibility, particularly for applications where performance justifies the expense. That kind of cooling is unlikely to make sense for every product. A cooled interposer is another technique under discussion, while Radhakrishnan pointed to 3D DRAM and other tightly stacked designs as areas where thermal choices will matter.

Heterogeneous integration offers another way to balance requirements: combine different technologies so each serves the part of an application it suits. Mueth said this could help high-performance designs that need a small footprint. It also adds coordination work, since teams must account for how materials and components behave together.

Even the timing of different physical effects matters. Berg noted that heat changes on a different timescale from electron movement through a transistor. Models and design decisions need to account for that mismatch. The stack’s materials, geometry and cooling approach all shape the thermal response, so thermal analysis can’t be detached from those choices.

Manufacturing techniques will influence how far vertical integration can go. Radhakrishnan pointed to hybrid bonding and smaller through-silicon vias as developments that could support denser connections. But progress in interconnects alone won’t settle the thermal question. The industry will still need materials and cooling methods that work for the intended application and its cost limits.

AI may help teams work across disciplines

The engineering organization is changing along with the design problem. Traditionally, thermal specialists handled thermal analysis after receiving data from other teams. Lin said chip agents could make it possible for a place-and-route engineer to ask for a thermal result, such as maximum temperature, and have an agent help run the simulation.

That could make multi-physics analysis easier to access, but ease of use is only part of the requirement. Radhakrishnan stressed that results have to be accurate: if a designer acts on an incorrect AI output, the design can go wrong. The geometry must also be available for quick simulation, and the results need to connect electrical, mechanical and other teams’ work.

Mueth described two routes to broader access: AI assistance, or simulation tools made simple enough that engineers can run analyses beyond their main specialty. Both address a real skills gap. Engineers trained in one domain now need to reason about interactions among several, while specialist teams remain responsible for validating the underlying models and results.

AI could also help coordinate work across the wider ecosystem. Ferguson compared the current moment to earlier transitions in chip scaling, when engineers questioned whether the next step was possible and then found ways to proceed. His concern is that teams can still work in isolation: changes to material chemistry, for example, may intersect with thermal choices without the relevant groups knowing the timing. Better coordination and tools that connect these efforts could reduce that disconnect.

Mueth said AI capabilities had advanced quickly in the past year, including in a recent hackathon, but customers still need to direct the work based on the problems they’re trying to solve. That places a practical burden on tool vendors: enable users to orchestrate workflows while making the results understandable and dependable.

GPU scale helps models, but calibration remains key

More varied compute hardware brings its own trade-offs. Combining CPUs, GPUs and other accelerators can make a design more complex, but distributing workloads across technologies may improve efficiency and, in turn, thermal and electrical performance. Berg said multiple options for training and inference also matter for effectiveness and cost.

For engineering software, Lin said traditional EDA acceleration has typically relied on CPUs. Multi-physics simulations involve substantial three-dimensional solving, where GPUs can parallelize matrix calculations and improve runtime. He described using thousands of GPUs together for partition-based 3D-IC design, with CPUs coordinating tasks and handling reasoning.

Large GPU runs can also produce synthetic data from coupled physics solvers. Berg said that data can support surrogate models that run on CPUs, letting engineers explore “what if” cases on a local machine. The catch is model reliability: the underlying multi-physics simulation needs calibration against data, and teams need to know where a surrogate is interpolating between known points and where it is extrapolating beyond them.

That distinction will shape how useful AI-assisted thermal work becomes. Stacked designs, advanced cooling and mixed technologies are advancing, but each brings costs and new interactions to model. For engineering teams, the near-term task is to close the loop between temperature, power, timing and materials—and to make the tools accurate enough that more disciplines can take part.

Read parts one and two of the discussion:
Scaling Thermal Analysis From Transistors To Data Centers
Rising power density and chiplet complexity drive thermal considerations earlier in the design process.

Thermal Complexity Grows With AI Chips And Photonics
Increasing power density makes heat, stress, and aging harder to predict, and more critical to address earlier in the design flow.

The post Why Heat Is Becoming A Bigger Chip Design Issue appeared first on Semiconductor Engineering.